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    首頁(yè)產(chǎn)品索引MC100E104

    MC100E104

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    ?Quint 2-Input AND/NAND Gate

    制造商:ON

    中文數(shù)據(jù)手冊(cè)

    產(chǎn)品信息

    The MC10E/100E104 is a quint 2-input AND/NAND gate. The function output F is the OR of all five AND gate outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be used.
    The 100 Series contains temperature compensation.
    • 600ps Max. Propagation Delay
    • OR/NOR Function Outputs
    • PECL Mode Operating Range: V
    • = 4.2 V to 5.7 V with V
    • = 0 V
    • NECL Mode Operating Range: V
    • = 0 V with V
    • = ?4.2 V to ?5.7 V
    • Internal Input Pulldown Resistors
    • ESD Protection: > 2 KV HBM, > 200 V MM
    • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
    • Moisture Sensitivity Level 1
    • For Additional Information, see Application Note AND8003/D
    • Flammability Rating: UL-94 code V-0 @ 1/8",Oxygen Index 28 to 34
    • Transistor Count = 134 devices
    • Pb-Free Packages are Available

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    MC100E104FNR2GON 立即購(gòu)買(mǎi)

    技術(shù)資料

    標(biāo)題類型大?。↘B)下載
    AC Characteristics of ECL DevicesPDF896 點(diǎn)擊下載
    ECL Clock Distribution TechniquesPDF54 點(diǎn)擊下載
    Interfacing Between LVDS and ECLPDF121 點(diǎn)擊下載
    Designing with PECL (ECL at +5.0 V)PDF102 點(diǎn)擊下載
    The ECL Translator GuidePDF142 點(diǎn)擊下載
    Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksPDF90 點(diǎn)擊下載
    ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information GuidePDF71 點(diǎn)擊下載
    Storage and Handling of Drypack Surface Mount DevicePDF49 點(diǎn)擊下載

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