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    首頁(yè)產(chǎn)品索引MC100EP16VB

    MC100EP16VB

    購(gòu)買收藏
    ?Differential Driver / Receiver with High and Low Gain

    制造商:ON

    中文數(shù)據(jù)手冊(cè)

    產(chǎn)品信息

    The EP16VB is a world-class differential receiver/driver. The device is functionally equivalent to the EP16 and LVEP16 devices but with both high and low gain outputs. Q
    and Q
    bar outputs have a DC gain several times larger than the DC gain of an EP16. Qbar output is provided for feedback purposes.
    The V
    pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to V
    as a switching reference voltage. V
    may also rebias AC coupled inputs. When used, decouple V
    and V
    via a 0.01μF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, V
    should be left open.
    Special considerations are required for differential inputs under No Signal conditions to prevent instability.
    The 100 Series contains temperature compensation.
    • 300 ps Typical Propagation Delay
    • Gain > 200
    • Maximum Frequency > 3 GHz Typical
    • PECL Mode Operating Range: V
    • = 3.0 V to 5.5 V with V
    • = 0 V
    • NECL Mode Operating Range: V
    • = 0 V with V
    • = –3.0 V to –5.5 V
    • V
    • Output

    電路圖、引腳圖和封裝圖

    在線購(gòu)買

    型號(hào)制造商描述購(gòu)買
    MC100EP16VBDTR2GONIC RCVR/DRVR 5V DIFF ECL 8-TSSOP 立即購(gòu)買
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    技術(shù)資料

    標(biāo)題類型大小(KB)下載
    AC Characteristics of ECL DevicesPDF896 點(diǎn)擊下載
    ECL Clock Distribution TechniquesPDF54 點(diǎn)擊下載
    Interfacing Between LVDS and ECLPDF121 點(diǎn)擊下載
    Designing with PECL (ECL at +5.0 V)PDF102 點(diǎn)擊下載
    The ECL Translator GuidePDF142 點(diǎn)擊下載
    Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksPDF90 點(diǎn)擊下載
    ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information GuidePDF71 點(diǎn)擊下載
    Storage and Handling of Drypack Surface Mount DevicePDF49 點(diǎn)擊下載

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