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    首頁產(chǎn)品索引NB3N853531E

    NB3N853531E

    購買收藏
    4 LVPECL

    制造商：ON

    中文數(shù)據(jù)手冊

    產(chǎn)品信息

    The NB3N853531E is a low skew 3.3 V supply 2:1:4 clock distribution fanout buffer. An input MUX selects either a Fundamental Parallel Mode Crystal or a LVCMOS/LVTTL Clock by using the CLK_SEL pin (HIGH for Crystal, LOW for Clock) with LVCMOS / LVTTL levels. The single ended CLK input is translated to four LVPECL Outputs.Using the crystal input, the NB3N853531E can be a Clock Generator.A CLK_EN pin can enable or disable the outputs synchronously to eliminate runt pulses using LVCMOS/LVTTL levels (HIGH to enable outputs, LOW to disable output).
    • Four Differential LVPECL Outputs
    • Selectable Crystal or LVCMOS/LVTTL CLOCK Inputs
    • Operating Range: VCC = 3.3 5% V( 3.135 to 3.465 V)
    • PbFree TSSOP20 Package
    • Up to 266 MHz Clock Operation
    • Output to Output Skew: 30 ps (Typ)
    • Device to Device Skew 200 ps (Max)
    • Propagation Delay 1.8 ns (Max)
    • Additive Phase Jitter, RMS: 0.053 ps (Typ.)
    • Synchronous Clock Enable Control
    • Industrial Temp. Range (40C to 85C)
    • These are PbFree Devices
    • 10Gigibit Ethernet

    在線購買

    型號制造商描述購買
    NB3N853531EDTGONClock Fanout Buffer (Distribution), Multiplexer IC 266MHz 20-TSSOP (0.173", 4.40mm Width) 立即購買
    NB3N853531EDTR2GON 立即購買

    技術(shù)資料

    標(biāo)題類型大?。↘B）下載
    AC Characteristics of ECL DevicesPDF896 點(diǎn)擊下載
    Storage and Handling of Drypack Surface Mount DevicePDF49 點(diǎn)擊下載
    Thermal Analysis and Reliability of WIRE BONDED ECLPDF119 點(diǎn)擊下載
    Clock Generation and Clock and Data Marking and Ordering Information GuidePDF71 點(diǎn)擊下載
    Board Mounting Notes for Quad Flat-Pack No-Lead Package (QFN)PDF40 點(diǎn)擊下載
    3.3 V Xtal Input or LVTTL/LVCMOS 2:1 MUX to 1:4 LVPECL Fanout BufferPDF246 點(diǎn)擊下載
    TSSOP-20 WBPDF38 點(diǎn)擊下載
    NB3N853531E IBIS ModelUNKNOW50 點(diǎn)擊下載

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