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    首頁(yè)產(chǎn)品索引MC100LVEL91

    MC100LVEL91

    購(gòu)買收藏
    ?Translator, Triple LVPECL / PECL Input to ECL Output

    制造商：ON

    中文數(shù)據(jù)手冊(cè)

    產(chǎn)品信息

    The MC100LVEL91 is a triple LVPECL input to ECL output translator. The device receives standard or low voltage differential PECL signals, determined by the VCC supply level, and translates them to differential -3.3 V to -5.0 V ECL output signals. (For translation from 5.0 V PECL to -5 V ECL output, see MC100EL91.)
    To accomplish the level translation the LVEL91 requires three power rails. The V
    supply should be connected to the positive supply, and the V
    pin should be connected to the negative power supply. The GND pins are connected to the system ground plane. Both V
    and V
    should be bypassed to ground via 0.01 μF capacitors.
    Under open input conditions, the Dbar input will be biased at V
    /2 and the D input will be pulled to GND. This condition will force the Q output to a low, ensuring stability.
    The V
    pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to V
    as a switching reference voltage.V
    may also rebias AC coupled inputs. When used, decouple V
    and V
    via a 0.01 μF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, V
    should be left open.
    • 620 ps Typical Propagation Delay
    • The 100 Series Contains Temperature Compensation
    • Operating Range: V
    • = 3.8 V to 3.3 V; V
    • = -3.0 V to -3.8 V; GND= 0 V
    • Q Output will Default LOW with Inputs Open or at GND
    • Pb-Free Packages are Available

    電路圖、引腳圖和封裝圖

    在線購(gòu)買

    型號(hào)制造商描述購(gòu)買
    MC100LVEL91DWR2GON 立即購(gòu)買
    MC100LVEL91DWGON 立即購(gòu)買

    技術(shù)資料

    標(biāo)題類型大?。↘B）下載
    Designing with PECL (ECL at +5.0 V)PDF102 點(diǎn)擊下載
    The ECL Translator GuidePDF142 點(diǎn)擊下載
    Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksPDF90 點(diǎn)擊下載
    ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information GuidePDF71 點(diǎn)擊下載
    Storage and Handling of Drypack Surface Mount DevicePDF49 點(diǎn)擊下載
    Interfacing with ECLinPSPDF72 點(diǎn)擊下載
    Termination of ECL Logic DevicesPDF176 點(diǎn)擊下載
    Thermal Analysis and Reliability of WIRE BONDED ECLPDF119 點(diǎn)擊下載

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