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    首頁(yè)產(chǎn)品索引MC14526B

    MC14526B

    購(gòu)買收藏
    ?Presettable 4-Bit Down Counters

    制造商：ON

    中文數(shù)據(jù)手冊(cè)

    產(chǎn)品信息

    The MC14526B binary counter is constructed with MOS P-channel and N-channel enhancement mode devices in a monolithic structure. This device is presettable, cascadable, synchronous down counter with a decoded "0" state output for divide-by-N applications. In single stage applications the "0" output is applied to the Preset Enable input. The Cascade Feedback input allows cascade divide-by-N operation with no additional gates required. The Inhibit input allows disabling of the pulse counting function. Inhibit may also be used as a negative edge clock.
    This complementary MOS counter can be used in frequency synthesizers, phase-locked loops, and other frequency division applications requiring low power dissipation and/or high noise immunity.
    • Supply Voltage Range = 3.0 Vdc to 18 Vdc
    • Logic Edge-Clocked Design - Incremented on Positive Transition of Clock or Negative Transition of Inhibit
    • Asynchronous Preset Enable
    • Capable of Driving Two Low-power TTL Loads or One Low-power Schottky TTL Load Over the Rated Temperature Range
    • Pb-Free Packages are Available

    電路圖、引腳圖和封裝圖

    在線購(gòu)買

    型號(hào)制造商描述購(gòu)買
    MC14526BDWGON 立即購(gòu)買
    MC14526BDWR2GON 立即購(gòu)買

    技術(shù)資料

    標(biāo)題類型大?。↘B）下載
    Presettable 4-Bit Down CountersPDF119 點(diǎn)擊下載
    IBIS Model for MC14526BCPUNKNOW5 點(diǎn)擊下載
    SO-16 WBPDF55 點(diǎn)擊下載
    MC14526B_PKG.GIFUNKNOW14 點(diǎn)擊下載

    應(yīng)用案例更多案例

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